32-bit Adder for Low Voltage Operation with Level Converters
نویسنده
چکیده
The purpose of this project is to lower the power consumption by reducing the operating voltage of a 32-bit adder, implemented with TSMC035 technology. The delay and power dissipation of the circuit at different voltages were studied and based on the power delay product an optimal voltage of operation was chosen. A level converter circuit was designed, in order to make the circuit compatible with other circuits. The optimal voltage of operation, taking into consideration the power dissipated by the level converters, was found to be 1.3V. A power saving of 73.12% with a power-delay product of 0.33pWs was obtained at this voltage.
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